In recently years, industry systems and controllers have gradually been digitalized as cheap CPUs having a high performance become abundantly available. However, most of the controllers share not only a digital part and but also an analog part.
Therefore, in order to transfer signals between different transducers and circuits, an ADC and a digital-to-analog converter (hereinafter, referred to as “DAC”) are required.
With the development of a microcomputer, lots of portions that were processed by analog components in the past are now digitally processed after the analog signals are converted into the digital signals using the ADC. This increases the reliability and efficiency of applications.
A Successive Approximation (hereinafter, referred to as “SAR”) ADC is one of the ADCs that have been widely used. The SAR ADC is more complicated than a digital ramp ADC in the circuit structure, but has a shorter conversion time.
The basic concept of the conventional ADC will be described below with reference to the accompanying drawing for a SAR ADC.
FIG. 1 is a block diagram showing one possible example of the conventional SAR ADC.
As is shown in FIG. 1, the conventional SAR ADC includes a SAR register 1 that initially specifies a n-bit intermediate value M, a DAC 2 that converts a digital signal, which is specified by the SAR register 1, into an analog signal, and a comparator 3 that compares an analog output value Vref output from the DAC 2 and an analog signal value Vin input for digital conversion and feedbacks the comparison result to the SAR register 1.
One possible operation algorithm of the conventional SAR ADC will be described below assuming.
It is assumed that the resolving power of the ADC is 8 bits and the unknown analog input signal is always positive in polarity. After 10000000 (i.e., the intermediate value M of 8 bits) is initially specified in the SAR register, the value is put into the DAC 2 for analog conversion, thus obtaining the output signal value Vref.
The comparator 3 compares the output signal Vref and the unknown analog signal Vin. If it is determined that the output signal value Vref of the DAC 2 equals to the analog signal value Vin, the conversion operation is completed.
If it is determined that the unknown analog signal Vin is greater than the Vref of the DAC 2, the SAR register 1 again specify the M as 11000000 (i.e., the intermediate value between the previous M and the maximum possible value 1111111) and input the new M to the DAC 2 for analog conversion, and allowing the comparator 3 to again compare the new M value and the unknown analog signal Vin.
To the contrary, if it is determined that the analog signal value Vin input for digital conversion is smaller than the output signal value Vref of the DAC 2, the SAR register 1 again specify the M as 01000000 (i.e., the intermediate value between the previous M and the minimum possible value 00000000) and input them to the DAC 2 for analog conversion, and allowing the comparator 3 to again compare the new M value and the analog signal Vin.
The processes allowing the SAR register specify new intermediate value M into the DAC are repeated until the updated M becomes equal to the unknown analog signal Vin within its resolution power of n-bit.
Another example of the conventional ADC is a flash ADC, the flash ADC converts the unknown analog signals into digital signal at once using comparators as many as the quantization numbers. In the case of an 8-bit ADC, the ADC includes 255 comparators connected to 256 steps voltage divider giving 1/0 signals for each and decodes the 1/0 signals into a binary number. The flash ADC has the highest conversion speed and a frequency range of several GHz.
Furthermore, a double slope ADC are used in an ADC for accurate measurement, and a sigma-delta ADC is used in a high resolution applications.
Furthermore, a RSFQ (Rapid Single Flux Quantum) ADC of a high sensitivity and high resolving power employing a superconducting Josephson junction circuit has been proposed.
The above mentioned ADCs except for the RSFQ ADC are semi-conducting device, requiring a stable voltage reference, such as a Zener diode, as an internal reference unit. The performance of the ADC greatly depends on the accuracy and stability of the internal reference unit.
However, the internal reference units have limited accuracy due to noise and have their characteristics varied depending on external environments, such as temperature and pressure, and used time. Accordingly, if such variation in the characteristics of the internal reference units is not corrected through periodical calibration, original accuracy cannot be obtained.
In a RSFQ ADC, non-conventional ADC where the characteristics of the Josephson junction is employed, an external clock frequency serves as the reference. Accordingly, the RSFQ ADC does not require any internal reference and does not have the problems of the above-mentioned semiconductor ADC.
However, the RSFQ ADC requires a hundred thousand or a million of Josephson junctions for physical metrology applications. This makes the design and fabrication very difficult. The RSFQ ADC is too sensitive to directly connect the signal under measurement, putting a barrier for accurate measurement since its input impedance is so low. Therefore, so far the RSFQ ADC is not suitable for accurate measurement in practice and is being developed for special purposes such as wireless communication or software radar.